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Renesas Electronics /R7FA6M3AH /GLCDC /SYSCNT_DTCTEN

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Interpret as SYSCNT_DTCTEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)VPOSDTC 0 (0)L1UNDFDTC 0 (0)L2UNDFDTC

L1UNDFDTC=0, VPOSDTC=0, L2UNDFDTC=0

Description

System Control Block State Detection Control Register

Fields

VPOSDTC

Specified line detection control

0 (0): Disables detection.

1 (1): Enables detection.
L1UNDFDTC

Graphics 1 underflow detection control

0 (0): Disables detection.

1 (1): Enables detection.
L2UNDFDTC

Graphics 2 underflow detection control

0 (0): Disables detection.

1 (1): Enables detection.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data